Verification Engineer

You are:  
Methodological & Organized  
A team player with good interpersonal and Communication skills
You will:  
Create and Execute verification plan to Chip/Sub System/IP    
Work closely with the Design, System, SW to ensure successful and timely implementation
Position Requirements:     
You hold a BSc in Electrical Engineering/ similar    
You have at least 3 years of hands-on work in VLSI verification    
You have a previous experience in Full chip/IP verification    
You have a previous experience in System Verilog, UVM    
You must be fluent in English