Job Responsibilities:
Be a knowledge center in FPGA design and development field.
Lead FPGA architecture design activity.
Design, Implement and verify FPGA blocks for Physical Layer base station products.
Lead FPGA blocks integration and Debug processes.
Bring-your-own innovation into our products.
Job Requirements:
Excellent understanding of FPGA architecture flows and characteristics, and Zynq SOC particularly.
Experience of at least 5 years in FPGA R&D.
Experience in 3GPP features/Wireless communication (PHY aspects
Good working knowledge with design and debug tools such as Vivado, ModelSim, QuestaSim, HdlDesigner, Logic Analyzer etc.
Previous experience as Tech Lead/Team leader – Advantage
An independent problem solver with excellent design and analytical skills.
Eager to learn and develop your professional skills in the field of wireless communications
Excellent communication skills, team worker and ability to thrive in a global multi-site environment
Education:
B.Sc in Electrical/Computer Engineering
Job Location:
Israel, central district