B.A/BSc. or above in Electrical engineering / Software / equivalent
5+ years of experience with verification of FPGA/ASIC
Knowledge of System Verilog
Knowledge in architecture/coding of verification elements such as BFM / Monitors/ Drivers / Reference model etc…
Knowledge of advanced verification methods UVM !!!
Knowledge of Perl/Python – Advantage
Knowledge of industry CAD simulators
oNCsim (Cadence)
oVCS (Synopsys)
oQuesta (Mentor)