Job description:
The function of the job requires the following major tasks:
• Design, implement and simulate FPGA designs
• System Bring-up and debug support with FW/SW
Requirements:
• B.SC in Electric Engineer – Must
• Experience with Verilog/VHDL at least 3 years – Must
• Experience with timing consideration STA
• Experience with simulation tools
• Experience in debug and bring up
• Experience with DDR, DSP, Controllers, SPI – advantage
• Experience with Xilinx FPGA – advantage
• High motivation with self-learning ability
• Team player
