Job description
Physical design of mixed signal circuits in advanced technology nodes. Be a part of the layout team activities in mixed signal chips aimed for the pro AV and the automotive products.
Technical responsibilities:
• Full custom layout of mixed signal circuits
• Custom layout tasks in full chip and block level:
• Full chip Floor planning
• Power mesh implementation
• IO ring implementation
• RDL routing
• Integration of analog and mixed signal IPs
• Physical verification – DRC, LVS , PERC
Job requirements
• Practical engineer graduate or higher in electrical engineering.
• 3+ years of experience in mixed signal circuits.
• Knowledge in Matching techniques, STD cell design, IO rings.
• Good acquaintance with Innovus/ICC and physical verification environment.
• Good social and verbal skills.
• Capable of working in a multi discipline / multi-site environment and meet tight schedules.
Advantages
• Fluent English.
• Acquaintance with various aspects and considerations of mixed signal full chip design flow from netlist to GDS: Floor plan, IO ring implementation, IR drop and EM prevention, bump map, Full chip integration of mixed signal circuits design.
• Experience in layout of circuits in Advanced nodes – 28nm, 16FF and below
• Acquaintance with Mentor Calibre and/or Cadence PVS
• Experience in interfacing Automatic PnR team %28LEF/DEF flow, Innovus%29.
• Knowledge in writing scripts in TCL, python.
